4.1.3 Connector J3

J3 contains 25 digital Signals to the SP-ICE-3 Card

Disconnect power from the SP-ICE-3 Card before connecting J3 to X403 GpioE of the SP-ICE-3 Card with the supplied cable.

A high level on the signal Laser_interface_enable (J3 Pin 1) enables the outputs drivers for LM, GATE, FPS and MEB on J2. When Laser_interface_enable is low, these outputs on J1 are high impedance mode.

A high level on Laser_voltage_enable (J1 Pin 2) enables the auxilary 5V output voltage on J2 Pin 6.

The signals Laser_MIP (J1 Pin 11), Laser_FPS (J1 Pin 19), Laser_GATE (J1 Pin 20) and Laser_LM (J1 Pin 22) are feed through a 5V TTL buffer to J2.

The signals preceded with "XY2_" are the buffered input and output signals to for the XY2-100 connector J1.

J3 Pinout

Name	Signal	Pin
PE.0 (Laser_interface_enable)	LVCMOS33_In	1
	GND	3
PE.3 (N.C.)	LVCMOS33_In	5
PE.4 (START_MARK)	LVCMOS33_Out	7
	GND	9
PE.7 (Laser_MIP)	LVCMOS33_In	11
PE.8 (N.C.)	LVCMOS33_In	13
	3.3V	15
PE.11 (N.C.)	LVCMOS33_In	17
PE.12 (Laser_FPS)	LVCMOS33_In	19
	GND	21
PE.15 (N.C.)	LVCMOS33_In	23
PE.16 (XY2_ZRT)	LVCMOS33_Out	25
	GND	27
PE.19 (XY2_ZCH)	LVCMOS33_In	29
PE.20 (XY2_YCH)	LVCMOS33_In	31
	3.3V	33
PE.23 (XY2_SYN)	LVCMOS33_In	35
	GND	37
	12V	39

Top View

Pin	Signal	Name
2	LVCMOS33_In	PE.1 (Laser_voltage_enable)
4	LVCMOS33_In	PE.2 (N.C.)
6	3.3V
8	LVCMOS33_Out	PE.5 (ABORT_MARK)
10	LVCMOS33_In	PE.6 (N.C.)
12	GND
14	LVCMOS33_In	PE.9 (N.C.)
16	LVCMOS33_In	PE.10 (N.C.)
18	GND
20	LVCMOS33_In	PE.13 (Laser_GATE)
22	LVCMOS33_In	PE.14 (Laser_LM)
24	3.3V
26	LVCMOS33_Out	PE.17 (XY2_YRT)
28	LVCMOS33_Out	PE.18 (XY2_XRT)
30	GND
32	LVCMOS33_In	PE.21 (XY2_XCH)
34	LVCMOS33_In	PE.22 (XY2_CLK)
36	LVCMOS33_InOut	PE.24 (OneWireEEPROM)
38	GND
40	12V

Electrical Characteristic LVCMOS33

Symbol	Parameter	Condition	Min	Typ	Max	Unit
		I_out = -4mA	2.6	3.3		V
		I_out = 4mA			0.4	V
V_IH	HIGH Level Input Voltage		2.0		3.6	V
V_IL	LOW Level Input Voltage		-0.3		0.8	V