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4.3.5 Configuration and Status Registers

The IPG-compatible Adapter's configuration and status registers can be accessed via the SPI module 2 on GPIO Port D.

Note  Note

This register documentation only applies to adapter hardware version R2 001 V3 or R3 001 V3.

For older hardware versions see Universal or Super Mode

  • The output Alarm signal (J3 pin 26) to the SP-ICE-3 Card will be activated whenever any of a user-specified set of patterns of active alarm inputs is recognised:

    • Alarm = alarm_pattern_A [ OR alarm_pattern_B [ OR ... ] ]

      • where

        alarm_pattern_X = alarm_input_J [ AND alarm_input_K [ AND ... ] ]

    • On the SP-ICE-3 Card the Alarm signal will cause the currently running job to be aborted.

  • The IPG-compatible Adapter allows connection of up to 6 alarm input signals.

  • Also included are the Interlock input and the Guide_Laser output.

  • The user can select which of the 28 = 256 possible patterns of alarm inputs will trigger the output Alarm signal to the SP-ICE-3 Card.

  • The 256 configuration bits for selecting the alarm input patterns are accessible as the Alarm Matrix via the IPG-compatible Adapter's SPI.

Configuration and Status Registers

The Configuration and Status Registers (CSR) for Super Mode are accessed indirectly via the SPI Register.

In oder to write a value to a CSR, the address of that CSR must be specified, along with the data to be written, via the SPI Register.

Similarly, in order to read from a CSR, its address must be specified via the SPI Register.

FLA_Read-Write-Timing2.svg
SPI Register Command/Data Bit Groups

Bit(s)

Command to SPI

Data from SPI

31

1 = WRITE access to the target CSR.

0 = READ access to the target CSR.

Unused: always 0.

30..24

Address of target CSR.

Unused: always 0.

23..16

Unused: always 0.

Unused: always 0.

15..0

WRITE access: Data to be written to the target CSR.

READ access: Data read from the target CSR.

CSR Details

Register Name

Address

Description

Unlock

0x00

A special unlock code sequence must be written to this CSR to enable WRITE access on all the other CSRs.

Note  Note

This sequence is not required for READ access to any of the CSRs.

The sequence requires writing the two data words 0xA569 and 0x1248 in that order to this CSR.

Writing any other value cancels the unlock sequence.

The state of the unlock sequence can be verified by reading the Unlock CSR:

  • A data value of 0x0000 means the write access to the other CSRs is disabled.

  • A data value of 0x0001 means the first unlock code word (0xA569) was written correctly.

  • A data value of 0x0003 means the unlock sequence is complete, and write access is enabled for all other CSRs.

Writing the first unlock code word (0xA569) to this CSR always leads to unlock state 0x0001.

  • Hence the unlocked state 0x0003 can be reached from any other (possibly unknown) state by entering the correct unlock code sequence.

Any number of writes to any register are possible after this sequence has been written. To re-establish the lock write 0x0000 to this register.

Alarm Dead Time

0x01

This CSR specifies the minimum dwell-time (in 1/32 microseconds) required for signals before they are recognised at the alarm inputs.

This feature is intended to suppress glitches on the alarm inputs.

The possible register values ranges from 0 to 65535. The default value is 128 (4 microseconds).

This register is part of the configuration loaded from ROM or FLASH memory.

Interface Control

0x02

Enable or disable various voltages.

Configuration bits 15..12

Bit

Name

Description

15

DRIVER_ENABLE

Set to '1' to enable the digital output driver on the IPG-compatible Adapter.

If set to '0' the digital output signals on J1 are in tristate.

14

s5V_Enable

Set to '1' to enable the 5V regulator on the IPG-compatible Adapter.

The 5V regulator supplies the Pull-Up resistors and the digital output drivers of J1.

13

VIO_Enable

Set to '1' to enable the VIO_out 5V voltage on J1 Pin 17.

The 5V regulator must be enabled by the s5V_Enable bit.

12

VIO_Port_Control

Set to '1' to enable PortD.4 to control the VIO_out 5V voltage on J1 Pin 17.

The 5V regulator must be enabled by the s5V_Enable bit.

This register is part of the configuration loaded from ROM or FLASH memory.

Input Status

0x03

This register contains the status of the input signals to the IPG-compatible Adapter.

The bits ending with "Edge_Missed" are set if the correspoiding input has had two edges or more since the last time this register was read. These bits are cleared automatically while a read operation is executed.

Input Status bits 15..0

Bit

Name

Description

15

s5V_Power_Good_Edge_Missed

Will be '1' if the s5V_Power_Good signal has changed more than once since the last register readout.

14

s5V_Power_Good_State

Reflects the state of s5V_Power_Good signal at the time of register readout.

s5V_Power_Good is '1' if the 5V power supply is working without error.

13

EM_Stop_Edge_Missed

Will be '1' if the EM_Stop signal has changed more than once since the last register readout.

12

EM_Stop_State

Reflects the state of EM_Stop signal at the time of register readout.

EM_Stop is '1' if the interlock loop is closed.

11

Sync_Alarm_Edge_Missed

Will be '1' if the Power_Monitor signal has changed more than once since the last register readout.

10

Sync_Alarm_State

Reflects the state of Sync_Alarm signal from J1 Pin 15 over jumper W1 at the time of register readout.

9

Back_Alarm_Edge_Missed

Will be '1' if the Back_Alarm signal has changed more than once since the last register readout.

8

Back_Alarm_State

Reflects the state of Back_Alarm signal from J1 Pin 24 over jumper W3 at the time of register readout.

7

Alarm4_Edge_Missed

Will be '1' if the Alarm4 signal has changed more than once since the last register readout.

6

Alarm4_State

Reflects the state of Alarm4 signal from J1 Pin 12 over jumper W4 at the time of register readout.

5

Alarm3_Edge_Missed

Will be '1' if the Alarm3 signal has changed more than once since the last register readout.

4

Alarm3_State

Reflects the state of Alarm3 signal from J1 Pin 11 over jumper W2 at the time of register readout.

3

Alarm2_Edge_Missed

Will be '1' if the Alarm2 signal has changed more than once since the last register readout.

2

Alarm2_State

Reflects the state of Alarm2 signal from J1 Pin 21 at the time of register readout.

1

Alarm1_Edge_Missed

Will be '1' if the Alarm1 signal has changed more than once since the last register readout.

0

Alarm1_State

Reflects the state of Alarm1 signal from J1 Pin 16 at the time of register readout.

Flash Control

0x08

This register controls loading the configuration from the IPG-compatible Adapter internal ROM or FLASH memory or storing the current configuration to the internal FLASH memory.

The IPG-compatible Adapter has 16 internal default configurations. Each of these default configurations can be selected by DIP-switch S1 to be loaded at power-up or it can be loaded by using this register. Configuration 0 to 14 (ROM) are fixed but configuration 15 (FLASH) can be changed.

A default configuration can be loaded by writing the desired configuration location (0..15) to bits 0..3 of this register while writing zeros to bits 4..15.

The current configuration can be saved to the IPG-compatible Adapter internal FLASH memory (at location 15) by writing a 1 to bit 4 of this register while writing 0 to all other bits.

While a there is a load or store opertion in progress a 1 will be returned in bit 0 of this register in a read operation. All other bits return 0 in a read operation.

Flash Control bits 15..0

Bit

Name

Description

15..5

unused

4

StoreCommand

Writing a 1 to this location stores the current configuration to the FLASH memory (location 15).

LoadLocation (bit 3..0) is ignored when a 1 is written to this bit. The store location is always 15.

3..0

LoadLocation

These four bits select one of the 16 configurations to be loaded from ROM (location 0..14) or FLASH (location 15) to the configuration registers.

The StoreCommand (bit 4) must be zero for a load to be executed.

Load Status

0x09

This register reports the current state of the configuration loaded from the IPG-compatible Adapter internal ROM or FLASH memory.

Load Status bits 15..0

Bit

Name

Description

15..13

unused

12

DipSwitchChanged

Is set to 1 if the dip-switch S1 state was changed since the last power-up.

11..8

CurrentDipSwitch

Contains the current state of dip-switch S1.

7

Busy

A 1 indicates that there is a load from ROM/FLASH or store to FLASH ongoing.

6

ModifiedSinceLastLoad

A 1 indicates there has been a write to a configuration register since the last load from ROM or FLASH.

5

LastLoadedTriggerByCommand

A 1 indicates indicates that the last load from ROM or FLASH was triggerd by writing to the Flash Control register.

4

LastLoadedTriggerByDipswitch

A 1 indicates indicates that the load load from ROM or FLASH was triggerd by changing the dip-switch S1.

This bit and bit 5 both beeing 0 indicates that the last load was triggered by a power-up.

3..0

LastLoadedSet

Tells which ROM or FLASH memory location was loaded at the last configuration load (either triggered by power-up, dip-switch state change or writing to the Flash Control register.

Alarm Matrix

0x10
to
0x1F

This CSR contains 256 bits, spanning 16 addresses, from address 0x10 (bits 0..15) to address 0x1F (bits 240..255).

Each bit determines whether the output Alarm signal (to the SP-ICE-3 Card) will be activated for one particular combination of the 6 alarm inputs from the laser, the Guide_Laser output and the Interlock input.

The alarm inputs are: Sync Alarm, Back Alarm, Alarm4, Alarm3, Alarm2, and Alarm1.

When the output Alarm signal is activated, the Yellow Alarm LED D10 on the bracket is switched ON (unless the shutter input J2 is open, in which case D10 blinks.)

An open interlock corresponds to bit 7 in the index beeing 1.

FLA_Super_mode_Bitmap_256.svg

This register is part of the configuration loaded from ROM or FLASH memory.

Error LED Matrix

0x20
to
0x2F

This CSR contains 256 bits, spanning 16 addresses, from address 0x20 (bits 0..15) to address 0x2F (bits 240..255).

Each bit in the CSR determines whether the red Error LED should ON or OFF for one particular combination of the 6 alarm inputs from the laser.

A 1 in the table indicates the LED to be lit.

The table format is similar to the Alarm Matrix register.

This register is part of the configuration loaded from ROM or FLASH memory.

LED D1 Matrix

0x30
to
0x3F

This CSR contains 256 bits, spanning 16 addresses, from address 0x30 (bits 0..15) to address 0x3F (bits 240..255).

Each bit in the CSR determines whether the Green LED D1 should be ON or OFF for one particular combination of the 6 alarm inputs from the laser.

A 1 in the table indicates the LED to be lit.

The table format is similar to the Alarm Matrix register.

This register is part of the configuration loaded from ROM or FLASH memory.

Revision

0x7F

This CSR contains the revision number of the FPGA image.

Programmatic Configuration via SPI

The IPG-compatible Adapter's SPI can be used for configuration as demonstrated in the following example.

C#
Copy
using (ClientAPI client = new ClientAPI(myCardIP))
{
    try
    {
        // 
        // Get the current SPI configuration, and adjust
        // it to make sure that Module 2
        // is enabled with correct settings.
        // 
        int module = 2;
        int timeout = 10;
        SpiConfig sc = client.Sfio.Spi.GetConfig();
        sc.Modules[module].Enabled = true;
        sc.Modules[module].OutputSource = DataSource.Spi;
        sc.Modules[module].BitsPerWord = 32;
        sc.Modules[module].SpiSyncMode = SyncMode.SyncPerWord;
        sc.Modules[module].ClockPeriod = 4;
        sc.Modules[module].PreDelay = 8;
        sc.Modules[module].PostDelay = 8;
        client.Sfio.Spi.SetConfig(sc);

        // 
        // Read the revison register
        // 
        uint[] myReadRevisionCmds = new uint[] {
             ( (uint)V3Mode.AccessFlag.Read | (uint)( V3Mode.Register.Revision ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & 0 ) )
        };
        uint[] revisionResponse = client.Sfio.Spi.Transceive(module, myReadRevisionCmds, timeout);

        // 
        // Unlock the IPG Adapter registers
        // 
        uint[] myUnlockCmds = new uint[] {
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.Unlock ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)V3Mode.UnlockCode.First ) ),
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.Unlock ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)V3Mode.UnlockCode.Second ) )
        };
        client.Sfio.Spi.Transceive(module, myUnlockCmds, timeout);

        // 
        // Check whether the unlock was sucessfull
        // 
        uint[] myReadUnlockCmds = new uint[] {
            ( (uint)V3Mode.AccessFlag.Read | (uint)( V3Mode.Register.Unlock ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0 ) )
        };
        uint[] spiResponse = client.Sfio.Spi.Transceive(module, myReadUnlockCmds, timeout);
        if (spiResponse[0] != 3)
        {
            throw new Exception("SPI Unlock sequence failed.");
        }

        // 
        // Configure Alarm Dead Time to 1us (= value 32)
        // and enable interface by writing to Interface Control
        // 
        uint[] myConfigurationCmds = new uint[] {
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmDeadTime    ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & 32 ) ),  // 32 = Alarm Dead Time to 1us
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.InterfaceControl ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (
                (uint)V3Mode.InterfaceControlBits.DRIVER_ENABLE         // Enables the digital ouput drivers (Emission_Enable, Emission_Modulation ...)
            |   (uint)V3Mode.InterfaceControlBits.s5V_Enable            // Enables the Power Supply for the digital output drivers and for the 5V output
            |   (uint)V3Mode.InterfaceControlBits.VIO_Enable            // Enables the VIO_Out 5V output voltage
            //|   (uint)V3Mode.InterfaceControlBits.VIO_Port_Control    // If enabled VIO_Out is controlled by PortD.4
            ) ) )
        };
        spiResponse = client.Sfio.Spi.Transceive(module, myConfigurationCmds, timeout);

        // 
        // Configure the Alarm Matrix
        // 
        // In the example, raise only an Alarm if Alarm1 = 1 and Alarm2 = 1 and Alarm3 = 1.
        // Also always raise an alarm if the interlock is open.
        // All other inputs (Alarm4, Back_Alarm, Sync_Alarm, Guide_Laser) are ignored.
        // 
        //                                                                                                              Alarm1  ====>  1010101010101010  BackAlarm -------
        //                                                                                                              Alarm2  ====>  1100110011001100  SyncAlarm -----  \
        //                                                                                                              Alarm3  ====>  1111000011110000  Guide_Laser -  \ |
        //                                                                                                              Alarm4  ====>  1111111100000000  Interlock -  \ | |
        //                                                                                                                             ||||||||||||||||             \ | | |
        uint[] myAlarmMatrixCmds = new uint[] { //                                                                                     ||||||||||||||||             | | | |
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix0 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1000000010000000 ) ),    //  0 0 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix1 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1000000010000000 ) ),    //  0 0 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix2 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1000000010000000 ) ),    //  0 0 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix3 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1000000010000000 ) ),    //  0 0 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix4 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1000000010000000 ) ),    //  0 1 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix5 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1000000010000000 ) ),    //  0 1 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix6 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1000000010000000 ) ),    //  0 1 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix7 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1000000010000000 ) ),    //  0 1 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix8 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1111111111111111 ) ),    //  1 0 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrix9 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1111111111111111 ) ),    //  1 0 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrixA ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1111111111111111 ) ),    //  1 0 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrixB ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1111111111111111 ) ),    //  1 0 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrixC ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1111111111111111 ) ),    //  1 1 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrixD ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1111111111111111 ) ),    //  1 1 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrixE ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1111111111111111 ) ),    //  1 1 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.AlarmMatrixF ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b1111111111111111 ) ),    //  1 1 1 1
        };
        client.Sfio.Spi.Transceive(module, myAlarmMatrixCmds, timeout);

        // 
        // Configure the Error LED Matrix
        // 
        // In the example, light the Error LED if Alarm1 = 1 and Alarm2 = 1 and Alarm3 = 0.
        // All other inputs (Alarm4, Back_Alarm, Sync_Alarm, Guide_Laser, Interlock) are ignored.
        //                                                                                                        
        //                                                                                                                 Alarm1  ====>  1010101010101010  BackAlarm -------
        //                                                                                                                 Alarm2  ====>  1100110011001100  SyncAlarm -----  \
        //                                                                                                                 Alarm3  ====>  1111000011110000  Guide_Laser -  \ |
        //                                                                                                                 Alarm4  ====>  1111111100000000  Interlock -  \ | |
        //                                                                                                                                ||||||||||||||||             \ | | |
        uint[] myErrorLEDCmds = new uint[] { //                                                                                           ||||||||||||||||             | | | |
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix0 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  0 0 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix1 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  0 0 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix2 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  0 0 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix3 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  0 0 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix4 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  0 1 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix5 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  0 1 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix6 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  0 1 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix7 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  0 1 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix8 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  1 0 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrix9 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  1 0 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrixA ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  1 0 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrixB ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  1 0 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrixC ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  1 1 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrixD ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  1 1 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrixE ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  1 1 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.ErrorLEDMatrixF ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000100000001000 ) ),    //  1 1 1 1
        };
        client.Sfio.Spi.Transceive(module, myErrorLEDCmds, timeout);

        // 
        // Configure the LED D1 Matrix
        // 
        // In the example, light the LED D1 (green) if Alarm1 = 0 and Alarm2 = 0 and Alarm3 = 0 and the Interlock is closed.
        // All other inputs (Alarm4, Back_Alarm, Sync_Alarm, Guide_Laser) are ignored.
        //                                                                                                     
        //                                                                                                              Alarm1  ====>  1010101010101010  BackAlarm -------
        //                                                                                                              Alarm2  ====>  1100110011001100  SyncAlarm -----  \
        //                                                                                                              Alarm3  ====>  1111000011110000  Guide_Laser -  \ |
        //                                                                                                              Alarm4  ====>  1111111100000000  Interlock -  \ | |
        //                                                                                                                             ||||||||||||||||             \ | | |  
        uint[] myLEDD1Cmds = new uint[] { //                                                                                           ||||||||||||||||             | | | |
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix0 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000100000001 ) ),    //  0 0 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix1 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000100000001 ) ),    //  0 0 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix2 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000100000001 ) ),    //  0 0 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix3 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000100000001 ) ),    //  0 0 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix4 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000100000001 ) ),    //  0 1 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix5 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000100000001 ) ),    //  0 1 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix6 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000100000001 ) ),    //  0 1 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix7 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000100000001 ) ),    //  0 1 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix8 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000000000000 ) ),    //  1 0 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1Matrix9 ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000000000000 ) ),    //  1 0 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1MatrixA ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000000000000 ) ),    //  1 0 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1MatrixB ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000000000000 ) ),    //  1 0 1 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1MatrixC ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000000000000 ) ),    //  1 1 0 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1MatrixD ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000000000000 ) ),    //  1 1 0 1
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1MatrixE ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000000000000 ) ),    //  1 1 1 0
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.LEDD1MatrixF ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & (uint)0b0000000000000000 ) ),    //  1 1 1 1
        };
        client.Sfio.Spi.Transceive(module, myLEDD1Cmds, timeout);

        // 
        // Lock the IPG Adapter registers
        // 
        uint[] myLockCmds = new uint[] {
            ( (uint)V3Mode.AccessFlag.Write | (uint)( V3Mode.Register.Unlock ) | ( (uint) V3Mode.ConfigFlags.Data_Mask & 0 ) )
        };
        client.Sfio.Spi.Transceive(module, myLockCmds, timeout);

    }
    catch (Exception ex)
    {
        Console.WriteLine("Uhhh, Houston? We've had a problem...{0}", ex.ToString());
    }
}
C#
Copy
namespace V3Mode
{
    public enum ConfigFlags : uint
    {
        Data_Mask       = 0x0000FFFF,
        Unused_23_16    = 0x00FF0000,
        Reg_Addr_Mask   = 0x7F000000,
        Write_Access    = 0x80000000
    }

    public enum AccessFlag : uint
    {
        Read = 0x00000000,
        Write = 0x80000000
    }

    public enum Register : uint
    {
        Unlock              = 0x00 << 24,
        AlarmDeadTime       = 0x01 << 24,
        InterfaceControl    = 0x02 << 24,
        InputStatus         = 0x03 << 24,
        FlashControl        = 0x08 << 24,
        LoadStatus          = 0x09 << 24,

        AlarmMatrix0         = 0x10 << 24,
        AlarmMatrix1         = 0x11 << 24,
        AlarmMatrix2         = 0x12 << 24,
        AlarmMatrix3         = 0x13 << 24,
        AlarmMatrix4         = 0x14 << 24,
        AlarmMatrix5         = 0x15 << 24,
        AlarmMatrix6         = 0x16 << 24,
        AlarmMatrix7         = 0x17 << 24,
        AlarmMatrix8         = 0x18 << 24,
        AlarmMatrix9         = 0x19 << 24,
        AlarmMatrixA         = 0x1A << 24,
        AlarmMatrixB         = 0x1B << 24,
        AlarmMatrixC         = 0x1C << 24,
        AlarmMatrixD         = 0x1D << 24,
        AlarmMatrixE         = 0x1E << 24,
        AlarmMatrixF         = 0x1F << 24,

        ErrorLEDMatrix0      = 0x20 << 24,
        ErrorLEDMatrix1      = 0x21 << 24,
        ErrorLEDMatrix2      = 0x22 << 24,
        ErrorLEDMatrix3      = 0x23 << 24,
        ErrorLEDMatrix4      = 0x24 << 24,
        ErrorLEDMatrix5      = 0x25 << 24,
        ErrorLEDMatrix6      = 0x26 << 24,
        ErrorLEDMatrix7      = 0x27 << 24,
        ErrorLEDMatrix8      = 0x28 << 24,
        ErrorLEDMatrix9      = 0x29 << 24,
        ErrorLEDMatrixA      = 0x2A << 24,
        ErrorLEDMatrixB      = 0x2B << 24,
        ErrorLEDMatrixC      = 0x2C << 24,
        ErrorLEDMatrixD      = 0x2D << 24,
        ErrorLEDMatrixE      = 0x2E << 24,
        ErrorLEDMatrixF      = 0x2F << 24,

        LEDD1Matrix0         = 0x30 << 24,
        LEDD1Matrix1         = 0x31 << 24,
        LEDD1Matrix2         = 0x32 << 24,
        LEDD1Matrix3         = 0x33 << 24,
        LEDD1Matrix4         = 0x34 << 24,
        LEDD1Matrix5         = 0x35 << 24,
        LEDD1Matrix6         = 0x36 << 24,
        LEDD1Matrix7         = 0x37 << 24,
        LEDD1Matrix8         = 0x38 << 24,
        LEDD1Matrix9         = 0x39 << 24,
        LEDD1MatrixA         = 0x3A << 24,
        LEDD1MatrixB         = 0x3B << 24,
        LEDD1MatrixC         = 0x3C << 24,
        LEDD1MatrixD         = 0x3D << 24,
        LEDD1MatrixE         = 0x3E << 24,
        LEDD1MatrixF         = 0x3F << 24,

        Revision             = 0x7F << 24
    }

    public enum UnlockCode : uint
    {
        First   = 0xA569,
        Second  = 0x1248
    }

    public enum InterfaceControlBits : uint
    {
        DRIVER_ENABLE       = 0x8000,
        s5V_Enable          = 0x4000,
        VIO_Enable          = 0x2000,
        VIO_Port_Control    = 0x1000
    }

    public enum InputStatusBits : uint
    {
        s5V_Power_Good_Edge_Missed  = 0x8000,
        s5V_Power_Good_State        = 0x4000,
        EM_Stop_Edge_Missed         = 0x2000,
        EM_Stop_State               = 0x1000,
        Sync_Alarm_Edge_Missed      = 0x0800,
        Sync_Alarm_State            = 0x0400,
        Back_Alarm_Edge_Missed      = 0x0200,
        Back_Alarm_State            = 0x0100,
        Alarm4_Edge_Missed          = 0x0080,
        Alarm4_State                = 0x0040,
        Alarm3_Edge_Missed          = 0x0020,
        Alarm3_State                = 0x0010,
        Alarm2_Edge_Missed          = 0x0008,
        Alarm2_State                = 0x0004,
        Alarm1_Edge_Missed          = 0x0002,
        Alarm1_State                = 0x0001
    }

    public enum FlashControlBits : uint
    {
        StoreCommand = 0x0010
    }

}
See Also