10.4.1 GPIO Port Function to Pin Mapping |
Note that the physical pin numbers for a particular port do not correspond 1:1 to the bit numbers of the card firmware's representation of the port, which is always register of contiguously numbered bits starting at 0.
This rather long-winded topic contains the following sections:
In general, the behaviour of any given pin can be defined by specifying some combination of the parameters show in the following table.
However, not all ports are created equal: some have pins which can only be used in a pre-defined Direction, others operate only at one fixed IOLevel, etc.
Parameter | Applies To | Description |
---|---|---|
The whole Port. | Which voltage level the physical pins will drive when defined as Outputs.
| |
Direction | One Pin-Group. | Whether the pins in the group are Inputs (passive) or Outputs (active). |
Polarity | An individual Pin. | Whether the pin is at high or low voltage when the bit for its mapped Function is asserted. |
Function | An individual Pin. | Defines the signal handling or generating role of the bit corresponding to the pin. |
The combination of Function and Direction specified for a particular bit, and consequently, for its corresponding pin, is called its Mapping.
The bit number is used to define the mapping, not the physical pin number!
Implementation constraints limit the number of different mappings available for any particular pin.
For a given pin, there are at most eight different mappings available: two sets of up to four Functions, one set for each of two Directions.
The sets of Functions are not interchangable between pins.
The available mappings for all of the pins can be retrieved programmatically by calling GpioAPIGetAvailableIOPinMappingList
Port |
Number of |
Available |
Available |
Number of |
---|---|---|---|---|
A | 16 | 5V, 3.3V | 2 | |
B | 16 | 5V, 3.3V | 2 | |
C | 16 |
| 1 | |
D | 24 | 3.3V | 24 | |
E | 24 | 3.3V | 24 |
Function | Description |
---|---|
GpInP.N | General Purpose Data Input. Port P, Bit N. |
GpOutP.N | General Purpose Data Output. Port P, Bit N. |
GpOutP.WR | General Purpose Output Write Signal. Port P. A write pulse is automatically generated each time the port's data value is altered. |
Power.N | Laser Power Data Output. Bit N. See: CommandList.AppendPower(UInt16) |
Power.WR | Laser Power Data Write Signal. A write pulse is automatically generated each time the port's data value is altered. |
SPIN.* | Serial Peripheral Interface Signals. Channel N. |
MotfN.* | MOTF Input Signals. Channel N. |
Start Mark | Process Control Input Signals. See: Minimum Timing Requirements, CommandList.AppendWaitStart, CommandList.AppendMotfWaitPart |
MEB | Process Control Output Signal. |
Arm Laser | Laser Control Output Signals. |
Triggered | Laser Control Input Signal. |
XY2.* | Scanner Communication Protocol Signals. |
See also: X903 PortA.
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 |
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 |
See also: X901 PortB.
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 |
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 |
See also: X906 PortC (Binning).
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 |
Note |
---|
When an Adapter Board is connected to Port D, the port automatically assumes a pre-defined mapping which cannot be altered by the user. See 10.4.3 GPIO Preset Configurations for Adapters for further details. |
See also: X402 GpioD.
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 | ||||
16 | ||||
17 | ||||
18 | ||||
19 | ||||
20 | ||||
21 | ||||
22 | ||||
23 |
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 | ||||
16 | ||||
17 | ||||
18 | ||||
19 | ||||
20 | ||||
21 | ||||
22 | ||||
23 |
Note |
---|
When an Adapter Board is connected to Port E, the port automatically assumes a pre-defined mapping which cannot be altered by the user. See 10.4.3 GPIO Preset Configurations for Adapters for further details. |
See also: X403 GpioE.
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 | ||||
16 | ||||
17 | ||||
18 | ||||
19 | ||||
20 | ||||
21 | ||||
22 | ||||
23 |
Bit |
Mapping |
Mapping |
Mapping |
Mapping |
---|---|---|---|---|
0 | ||||
1 | ||||
2 | ||||
3 | ||||
4 | ||||
5 | ||||
6 | ||||
7 | ||||
8 | ||||
9 | ||||
10 | ||||
11 | ||||
12 | ||||
13 | ||||
14 | ||||
15 | ||||
16 | ||||
17 | ||||
18 | ||||
19 | ||||
20 | ||||
21 | ||||
22 | ||||
23 |